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4109LS–8051–02/08

AT8xC51SND1C

7.4.4

Analog to Digital Converter

7.4.4.1

Definition of symbols

Table 39. Analog to Digital Converter Timing Symbol Definitions

7.4.4.2

Characteristics

Table 40. Analog to Digital Converter AC Characteristics

VDD = 2.7 to 3.3 V, TA = -40 to +85°C

Notes:

1. AVDD= AVREFP= 3.0 V, AVSS= AVREFN= 0 V. ADC is monotonic with no missing code.

2. The differential non-linearity is the difference between the actual step width and the ideal step

width (see Figure 7-22).

3. The integral non-linearity is the peak difference between the center of the actual step and the

ideal transfer curve after appropriate adjustment of gain and offset errors (see Figure 7-22).

4. The offset error is the absolute difference between the straight line which fits the actual trans-

fer curve (after removing of gain error), and the straight line which fits the ideal transfer curve

(see Figure 7-22).

5. The gain error is the relative difference in percent between the straight line which fits the actual

transfer curve (after removing of offset error), and the straight line which fits the ideal transfer

curve (see Figure 7-22).

Signals

Conditions

Clock

High

Enable (ADEN bit)

Low

Start Conversion

(ADSST bit)

Symbol

Parameter

Min

Max

Unit

CLCL

Clock Period

EHSH

Start-up Time

SHSL

Conversion Time

11T

CLCL

DLe

Differential non-

linearity error(1)(2)

LSB

ILe

Integral non-

linearity errorss(1)(3)

LSB

OSe

Offset error(1)(4)

LSB

Gain error(1)(5)

LSB

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